IC Senior Digital Design Engineer

About u-blox Swiss-based u-blox (SIX:UBXN) is a global leader in wireless and positioning semiconductors and modules for the automotive, industrial and consumer markets. Our solutions enable people, vehicles and machines to locate their exact position and wirelessly communicate via voice, text or video. With a broad portfolio of chips, modules and software solutions, u-blox is uniquely positioned to allow OEMs to develop innovative solutions that enable mobility quickly and cost-effectively. With headquarters in Thalwil, Switzerland, u-blox is globally present with offices in Europe, Asia and the USA. (www.u-blox.com)

Job Title: IC Senior Digital Design Engineer

Position: This position aims at a wide span of responsibilities from specification to volume production. As IC Senior Digital Design Engineer you will implement complex IP and assemble the complete system of the IPs from different sources. Furthermore you will be responsible for IP and complete system verification, characterization, for supporting production test development and interfacing with third parties. As Senior Engineer we expect highly independent work attitude and innovation skills.

Tasks:
? Specification, design and integration of digital blocks
? Design verification at block and top level
? Ensure performance to specification and readiness for production
? Technical reporting both written and oral
? Design partitioning
? Follow design and certification methodology, HW/SW co-design, FPGA prototyping
? Third party IP evaluation and selection
? IP protection (patent application & research)
? Responsible for:
o specification of sub-block to meet system requirements
o verification/validation of developed blocks
o measured results meeting reported simulation results and to meet quality standards in design flow

Requirements:
? Master Degree in Electrical Engineering
? Minimum 5 years experience in commercial HDL design: Embedded CPU, bus-systems, peripherals, co-processors, memories, clock- and power management, test and verification
? Excellent skills in ASIC design tool usage, e.g. Synopsys, Modelsim, Cadence
? Experience in communication systems IP design: DSP, hardware accelerators, co-processors, dedicated IP
? Experience in UVM verification environment
? Used to work independently and precisely
? Good communications skills
? Fluent in English