OBS! Ansökningsperioden för denna annonsen har
passerat.
Arbetsbeskrivning
We are looking for several ASIC designers for telecom applications, initially for a project in Stockholm starting in August. Wanted competence: - The designer should have 8-10 years of experience. - Experience of top-down synthesis, STA and constraint development of multi million gate ASIC - Knowledge of back-end flows and ools from leading ASIC suppliers - Functional verification using Specman - Skilled in VHDL and Verilog - Data management using Clearcase Applicants please send a detailed CV in Word-format Consultants having their own companies may also apply. We do not wish recruiters and others to contact us on account of this advertisement.