ASIC Verification Engineer

Job Summary:
You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs
Your responsibility will be either top or block level verification of a FPGA design

Required competence (need to have)

Minimum 5 years experience of ASIC/FPGA verification
Experienced of Specman tools
Excellent e programming skills
Good c/c++ programming skills
Knowledge of hardware design (VHDL/Verilog)
Knowledge of verification methodology
Good written and verbal communication skills in English

Experience in HW verification using e.g. OVM/UVM.
Experience in system level verification.
SystemVerilog, SystemC
Telecom experienced in WCDMA, GSM and/or LTE systems
Xilinx and Altera experience