ASIC/FPGA Verification Engineer

Arbetsbeskrivning

We are looking for a candidate who can perform below role and responsibilities;
Participate and responsible for Verification planning & Verification specification
Prepare & create needed Verification environment (creation / adaptation / maintenance)
Test case creation
Usage and development of uVC´s
Usage of reference models
Constrained random testing
Creation of Coverage matrix
Writing verification reports

Sammanfattning

  • Arbetsplats: Rediflex AB Malmö
  • 1 plats
  • Tills vidare
  • Heltid
  • Fast månads- vecko- eller timlön
  • Publicerat: 20 oktober 2021
  • Ansök senast: 5 november 2021

Postadress

Ingenjörsgatan 22
Malmö, 21568

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