ASIC/FPGA Verification Engineer

We are looking for an ASIC/FPGA verification engineer to join a team developing complex designs for mobile communication applications.

Job description:

You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs
Your responsibility will be either top or block level verification of an ASIC/FPGA design

Required competence (must have):

Minimum 3 years experience of ASIC/FPGA verification
Documented previous experience with Specman and e language skills
Experience from verification of complex digital SoC designs with CPUs, DSPs, advanced filters and high speed links

Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated
Candidates shall also have good written and verbal communication skills in English.

Highly desired competence (good to have):

Experience from C++, VHDL, Verilog, SystemC, SystemVerilog, PERL, Xilinx and Altera experience

Immediate start, work location will be in Stockholm, Sweden.