Scrum Master (ASIC)

We are looking for a Scrum Master that could both lead the team and contribute to the development of next generation ASIC towards the telecom.

The team has responsibility to develop reusable High speed communication IP blocks or adapt IP blocks to specific ASIC targets. The design is written in System Verilog and verification is implemented with UVM.

Most of the team members in Stockholm region.

The customer will be represented by product owner and Project manager who works in tight collaboration with the team when prioritizing and refining a development backlog using an agile development process.

In the role as Scrum Master you will:

Work closely with the product owner to prioritize and refine the development backlog and collaborate with the team to identify and remove impediments.

Gather estimate and provide time plan to customer stakeholders.

Coach team members in Agile methods and other relevant topics.

Have experience in driving Agile activities, such as daily meetings, retrospectives, planning etc.

Be an optimistic team player with excellent communication skills who can create engagement and team spirit.

Represent the team in meetings with managers and project managers and ensure that the team understands the project's priorities and time plans.

Making the team as high-performing as possible running workshops in collaboration with team manager (communication, collaboration, group dynamics etc.)

Work with improving way of working and processes for the customer.

As a developer we see that you either work independently with Design or Verification in UVM.

Good knowledge of UVM verification and SystemVerilog

Used to work with complex ASIC and/or large FPGA design

Experience from IP block verification

Multi clock domains

RTL within Verilog, VHDL and/or SystemVerilog

Good English skills, in both speech and writing Meritorious if you have:

Test bench structuring and design

RTL design knowledge

Scripting skills