OBS! Ansökningsperioden för denna annonsen har
passerat.
Arbetsbeskrivning
About the Opportunity
Professional Galaxy looking for an experienced and expert verification engineer to lead innovation in the ever-evolving world of telecommunications.
As a senior member of our ASIC IP team, you’ll be instrumental in shaping the 5G and 6G waves. Your experience and insight will play a pivotal role in ensuring the delivery of high-quality IPs that shape the future of global connectivity. In this role, you’ll be more than an engineer; you'll lead, innovate, and ensure the highest-quality IPs are developed. Your expertise will be critical in turning game-changing ideas into real-world solutions that will shape the future of connectivity while being part of a culture that thrives on creativity, collaboration, and making a real-world impact.
What You’ll Do:
• Develop a comprehensive verification planning, including specifications.
• Architect and enhance state-of-the-art verification environments.
• Implement and maintain UVCs, ensuring every corner of the design is verified.
• Drive both random and directed testing strategies to uncover hidden bugs.
• Leverage advanced coverage techniques to ensure top-tier verification completeness.
• Champion continuous improvement in product quality, efficiency, and workflows.
Skills you bring
• Expertise in ASIC or FPGA verification at IP, sub-system, and chip levels, using SystemVerilog UVM. Possibly over 8 years of experience in Verification.
• Hands On experience designing UVM test environments and driving coverage closure
• An insatiable curiosity, ready to learn something new daily and apply it to make a real
difference.
• Creative problem-solving skills—you see challenges as opportunities for innovation.
• A collaborative spirit and the ability to thrive independently, with exceptional communication skills.
• A results-oriented mindset with a passion for continuous improvement, always seeking more innovative, faster solutions.
• A Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Start date: 20250216
Deadline: 20250210